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| MC74LVX126 Quad Bus Buffer With 5V-Tolerant Inputs The MC74LVX126 is an advanced high speed CMOS quad bus buffer. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. The MC74LVX126 requires the 3-state control input (OE) to be set Low to place the output into the high impedance state. Features http://onsemi.com MARKING DIAGRAMS 14 14 1 SOIC-14 D SUFFIX CASE 751A 1 14 LVX126 AWLYWW * * * * * * * * High Speed: tPD = 4.4 ns (Typ) at VCC = 3.3 V Low Power Dissipation: ICC = 4 mA (Max) at TA = 25C Power Down Protection Provided on Inputs Balanced Propagation Delays Low Noise: VOLP = 0.5 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model >2000 V Machine Model >200 V 14 1 TSSOP-14 DT SUFFIX CASE 948G LVX 126 ALYW 1 14 SOEIAJ-14 M SUFFIX CASE 965 1 1 74LVX126 ALYW 14 A L, WL Y W, WW = = = = Assembly Location Wafer Lot Year Work Week ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. (c) Semiconductor Components Industries, LLC, 2005 1 February, 2005 - Rev. 2 Publication Order Number: MC74LVX126/D MC74LVX126 VCC 14 OE3 13 D3 12 O3 11 OE2 10 D2 9 O2 8 OE0 D0 OE1 1 OE0 2 D0 3 O0 4 OE1 5 D1 6 O1 7 GND D1 1 2 4 5 6 O1 3 O0 OE2 D2 OE3 D3 10 9 13 12 11 O3 8 O2 Figure 1. 14-Lead Pinout (Top View) Figure 2. Logic Diagram PIN NAMES Pins OEn Dn On Function Output Enable Inputs Data Inputs 3-State Outputs FUNCTION TABLE INPUTS OEn H H L Dn L H X OUTPUTS On L H Z H = High Voltage Level; L = Low Voltage Level; Z = High Impedance State; X = High or Low Voltage Level and Transitions Are Acceptable, for ICC reasons, DO NOT FLOAT Inputs III I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I III I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I III I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I III I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII MAXIMUM RATINGS Symbol Parameter Value Unit V V V VCC Vin DC Supply Voltage DC Input Voltage -0.5 to +7.0 -0.5 to +7.0 Vout IIK DC Output Voltage -0.5 to VCC +0.5 -20 20 25 50 Input Diode Current mA mA mA mA IOK Iout Output Diode Current DC Output Current, per Pin ICC PD DC Supply Current, VCC and GND Pins Power Dissipation 180 mW C Tstg Storage Temperature -65 to +150 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min 2.0 0 0 Max 3.6 5.5 Unit V V V VCC Vin DC Supply Voltage DC Input Voltage Vout TA DC Output Voltage VCC Operating Temperature, All Package Types Input Rise and Fall Time -40 0 +125 100 C Dt/DV ns/V http://onsemi.com 2 II I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I II I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII I IIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 4 (per bit). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design. II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I I I II I I I I I I I IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIII I I I I II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIII I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII II I I I I I II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I II I I I I I I I IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIIIIII I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIIIIII I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I I I I II I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIII I II II I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I I I I I I IIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIIIII I I I I I II I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II I I I I I I I I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII I I IIIIIIIIIIIIIIIIIIII I I III II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) DC ELECTRICAL CHARACTERISTICS tPLZ, tPHZ tPZL, tPZH tPLH, tPHL tOSHL tOSLH ICC IOZ Iin VOL VOH VIL VIH Symbol Symbol Output-to-Output Skew (Note 1) Output Disable Time OE to O Output Enable Time OE to O Propagation Delay Input to Output Quiescent Supply Current Maximum Three-State Leakage Current Input Leakage Current Low-Level Output Voltage (Vin = VIH or VIL) High-Level Output Voltage (Vin = VIH or VIL) Low-Level Input Voltage High-Level Input Voltage Parameter Parameter VCC = 2.7 V VCC = 3.3 0.3 V VCC = 3.3 0.3 V RL =1 kW VCC = 2.7 V RL =1 kW VCC = 3.3 0.3 V RL =1 kW VCC = 2.7 V RL =1 kW VCC = 3.3 0.3 V VCC = 2.7 V IOL = 50 mA IOL = 50 mA IOL = 4 mA IOH = -50 mA IOH = -50 mA IOH = -4 mA Vin = VCC or GND Vin = VIL or VIH Vout = VCC or GND Vin = 5.5 V or GND Test Conditions Test Conditions CAPACITIVE CHARACTERISTICS CPD Cout Cin Symbol Power Dissipation Capacitance (Note 2) Maximum Three-State Output Capacitance Input Capacitance Parameter http://onsemi.com MC74LVX126 CL = 50 pF CL = 50 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 50 pF VCC V 3.6 3.6 3.6 2.0 3.0 3.0 2.0 3.0 3.0 2.0 3.0 3.6 2.0 3.0 3.6 3 1.9 2.9 2.58 MinIIIMaxIII TypIIIMin Max Min MinIIIMaxIII TypIIIMin Max 1.5 2.0 2.4 TA = 25C TA = 25C TA = 25C 10.0 Typ 8.3 4.0 6.5 5.3 7.8 3.9 5.9 5.5 7.5 0.0 0.0 2.0 3.0 14 6 4 0.25 9.3 12.8 0.1 0.1 0.36 15.7 10.1 13.6 Max 0.1 11.2 1.5 1.5 5.6 9.1 6.2 9.7 4.0 0.5 0.8 0.8 10 1.9 2.9 2.48 Min TA = 85C TA = 85C TA = 85C 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.5 2.0 2.4 8.5 12.0 0.1 0.1 0.44 13.0 19.0 12.5 16.0 13.5 17.0 Max 2.5 1.0 7.5 11.0 1.5 1.5 0.5 0.8 0.8 10 40 TA = 125C TA = 125C TA = 125C Min Min Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.5 2.0 2.4 9.5 13.0 11.0 14.0 0.1 0.1 0.52 1.9 2.9 2.34 Max 15.0 21.0 15.5 18.5 15.0 19.0 Max 5.0 1.0 Max 1.5 1.5 0.5 0.8 0.8 10 40 Unit Unit Unit mA mA mA pF pF pF ns ns ns ns V V V V MC74LVX126 NOISE CHARACTERISTICS (Input tr = tf = 3.0 ns, CL = 50 pF, VCC = 3.3 V, Measured in SOIC Package) TA = 25C Symbol VOLP VOLV VIHD VILD Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage Characteristic Typ 0.3 -0.3 Max 0.5 -0.5 2.0 0.8 Unit V V V V ORDERING INFORMATION Device MC74LVX126D MC74LVX126M MC74LVX126MEL Package SOIC-14 SOEIAJ-14 SOEIAJ-14 Shipping 55 Units / Rail 50 Units / Rail 2000 Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. SWITCHING WAVEFORMS VCC tPHL 50% VCC GND O O VCC tPZL 50% VCC tPZH 50% VCC tPHZ tPLZ GND HIGH IMPEDANCE VOL +0.3 V VOH -0.3 V HIGH IMPEDANCE D tPLH 50% OE 50% O Figure 3. Figure 4. TEST CIRCUITS TEST POINT OUTPUT DEVICE UNDER TEST CL* DEVICE UNDER TEST TEST POINT OUTPUT 1 kW CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH. CL* *Includes all probe and jig capacitance *Includes all probe and jig capacitance Figure 5. Propagation Delay Test Circuit Figure 6. Three-State Test Circuit http://onsemi.com 4 MC74LVX126 PACKAGE DIMENSIONS PDIP-14 P SUFFIX CASE 646-06 ISSUE N NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --- 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 18.80 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 --- 10 _ 0.38 1.01 14 8 B 1 7 A F N -T- SEATING PLANE L C K H G D 14 PL 0.13 (0.005) M J M DIM A B C D F G H J K L M N SOIC-14 D SUFFIX CASE 751A-03 ISSUE G -A- 14 8 -B- P 7 PL 0.25 (0.010) M B M 1 7 G C R X 45 _ F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 -T- SEATING PLANE D 14 PL 0.25 (0.010) M K TB S M A S J DIM A B C D F G J K M P R http://onsemi.com 5 |
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